ANSI-INCITS-361-2002.pdf

ANSI INCITS 361-2002 Erratum for Information Technology - AT Attachment with Packet Interface Extensions 6 (ATNATAPI-6) 1 Corrected: June 2, 2004 Secretariat: Information Technology Industry Council 1 Page 1 of 9 pages Page 65, subclause 7.5.4. The direction of data flow was incorrectly described. DMA Data in is read from the data port. DMA Data out is written to the data port. Page 66 subclause 7.6.4. The direction of data flow was incorrectly described. PIO Data in is read from the data register. PIO Data out is written to the data register. Replace pages 65 - 66 with pages 65 - 66A in this erratum. Page 341 subclause 9.8. Figure 33 does not show the transition HPD3:HPD4 DMARQ asserted. Clause 5.2.8 DMARQ (DMA request) describes the host behavior when DMARQ is asserted. The Figure and description omitted the state transition described in 5.2.8. In this erratum, pages 65-66A and 341-343 are reprinted with corrections. An American National Standard implies a consensus of those substantially concerned with its scope and provisions. An American National Standard is intended as a guide to aid the manufacturer, the consumer, and the general public. The existence of an American National Stan- dard does not in any respect preclude anyone, whether he has approved the standard or not, from manufacturing, marketing, purchasing, or using products, processes, or procedures not conforming to the standard. American National Standards are subject to periodic review and users are cautioned to obtain the latest editions. The American National Standards Institute does not develop standards and will in no circumstances give an interpretation of any American National Standard. Moreover, no person shall have the right or authority to issue an interpretation of an American National Standard in the name of the American National Standards Institute. CAUTION NOTICE: This American National Standard may be revised or withdrawn at any time. The procedures of the American National Standards Institute require that action be taken to reaffirm, revise, or withdraw this standard no later than five years from the date of approval. Purchasers of American National Standards may receive current information on all standards by calling or writing the American National Standards Institute. Copyright O 2004 by Information Technology Industry Council (ITI), 1250 Eye Street NW, Washington, DC 20005 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- ANSI INCITS 361-2002 15 I 14 I 13 7.5 Data port 12 11 10 9 8 7.5.1 Address When DMACK- is asserted, CSO- and CSI- shall be negated and transfers shall be 16 bits wide. CS1 I CSO I DA2 I DAI I DAO A = asserted, N = negated, X = dont care NI NI XI XI X 7.5.2 Direction This port is read/write. 7.5.3 Access restrictions This port shall be accessed for host DMA data transfers only when DMACK- and DMARQ are asserted. 7.5.4 Effect DMA data-out transfers are processed by a series of writes to this port, each write transferring the data that follows the previous write. DMA data-in transfers are processed by a series of reads to this port, each read transferring the data that follows the previous read. The results of a read during a DMA out or a write during a DMA in are indeterminate. 7.5.5 Functional description The data port is 16-bits in width 7.5.6 Fieldlbit description 7.6 Data register 7.6.1 Address CS1 I CSO I DA2 I DAI I DAO NI AI NI NI N I A = asserted, N = negated I 7.6.2 Direction This register is read/write. 65 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- ANSI INCITS 361-2002 15 I 14 I 13 7.6.3 Access restrictions 12 11 10 9 8 This register shall be accessed for host PIO data transfer only when DRQ is set to one and DMACK- is not asserted. The contents of this register are not valid while a device is in the Sleep mode. 7.6.4 Effect PIO data-out transfers are processed by a series of writes to this register, each write transferring the data that follows the previous write. PIO data-in transfers are processed by a series of reads to this register, each read transferring the data that follows the previous read. The results of a read during a PIO out or a write during a PIO in are indeterminate 7.6.5 Functional description The data register is 16 bits wide. When a CFA device is in 8-bit PIO data transfer mode this register is 8 bits wide using only DD7 to DDO. 7.6.6 Fieldlbit description I Data( 7 : O) I 7.7 Device register 7.7.1 Address 5 A = asserted, N = ne ated 7.7.2 Direction This register is read/write. 7.7.3 Access restrictions This register shall be written only when both BSY and DRQ are cleared to zero and DMACK- is not asserted. The contents of this register are valid only when BSY is cleared to zero. If this register is written when BSY or DRQ is set to one, the result is indeterminate. For devices not implementing the PACKET Command feature set, the contents of this register are not valid while a device is in the Sleep mode. For devices implementing the PACKET Command feature set, the contents of this register are valid while the device is in Sleep mode. 7.7.4 Effect The DEV bit becomes effective when this register is written by the host or the signature is set by the device. All other bits in this register become a command parameter when the Command register is written. 66 Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- ANSI INCITS 361-2002 7 Obsolete 7.7.5 Functional description 6 5 4 3 2 1 O # Obsolete DEV # # # # Bit 4, DEV, in this register selects the device. Other bits in this register are command dependent (see clause Error! Reference source not found.). 7.7.6 Fieldlbit description 66A Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- ANSI INCITS 361-2002 PACKET command written - H14:HPDO BSY= 1 HPD0:HPDO m HPDO: Check-Status-A HPDI : Send-Packet - BSY = O their existence does not in any respect preclude anyone, whether he has approved the standards or not, from manufacturing, marketing, purchasing, or using products, processes, or procedures not conforming to the standards. The American National Standards Institute does not develop standards and will in no circumstances give an interpretation of any American National Standard. Moreover, no person shall have the right or authority to issue an interpretation of an American National Standard in the name of the American National Standards Institute. Requests for interpretations should be addressed to the secretariat or sponsor whose name appears on the title page of this standard. CAUTION NOTICE: This American National Standard may be revised or withdrawn at any time. The procedures of the American National Standards Institute require that action be taken periodically to reaffirm, revise, or withdraw this standard. Purchasers of American National Standards may receive current information on all standards by calling or writing the American National Standards Institute. CAUTION: The developers of this standard have requested that holders of patents that may be re- quired for the implementation of the standard disclose such patents to the publisher. However, nei- ther the developers nor the publisher have undertaken a patent search in order to identify which, if any, patents may apply to this standard. As of the date of publication of this standard, following calls for the identification of patents that may be required for the implementation of the standard, notice of one or more such claims has been received. By publication of this standard, no position is taken with respect to the validity of this claim or of any rights in connection therewith. The known patent holder(s) has (have), however, filed a statement of willingness to grant a license under these rights on reasonable and nondiscriminatory terms and conditions to applicants desiring to ob- tain such a license. Details may be obtained from the publisher. No further patent search is con- ducted by the developer or publisher in respect to any standard it processes. No representation is made or implied that this is the only license that may be required to avoid infringement in the use of this standard. Published by American National Standards Institute, Inc. 25 West 43rd Street, New York, NY 10036 Copyright O 2002 by Information Technology Industry Council (ITI) All rights reserved. No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without prior written permission of ITI, 1250 Eye Street NW, Washington, DC 20005. Printed in the United States of America Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- Contents Page Foreword . VIII Introduction . .x . 1 2 2.1 2.2 2.3 3 3.1 3.2 4 4.1 4.2 5 5.1 5.2 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 Scope . . Normative references . 1 Approved references . . 1 References under development Other references . 2 Definitions, abbreviations, and conventions . Definitions and abbreviations Conventions . . 5 Interface physical and electrical requirements . Cable configuration . Electrical characteri . 11 Interface signal assignments and descriptions . Signal summary. . Signal descriptions . 17 Command delivery . Register delivered data transfer command sector addressing . 22 Interrupts . General feature set . 23 Multiword DMA . . Ultra DMA featur . 26 Host determination of cable type by detecting CBLID- PACKET Command feature set . . 30 Overlamed feature set . General operational requirements . . 6.10 Queued feature set 6.1 1 Power Management feature set 6.12 Advanced Power Management featu 6.1 3 Security Mode feature set 6.14 Self-monitoring, analysis, and reporting technology featur 6.1 5 Host Protected Area feature set 6.1 6 CFA feature set . 6.17 Removable Media Status Notification 6.18 Power-Up In Standby feature set 6.1 9 Automatic Acoustic Management feature set 6.20 48-bit Address feature set . 6.21 Device Configuration Overlay feature set 6.22 Media Card Pass Through Command feature set 55 6.23 General Purpose Logging feature set 7 Interface register definitions and descriptions . . 56 7.1 Device addressing considerations . . 56 7.2 1 1 0 register descriptions . . 63 . 32 . 36 . 47 vable Media feature sets 48 . 50 . 50 . 51 . 52 . 56 I Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- Page 7.3 Alternate Status register 63 7.4 Command register 64 7.7 Device register 7.8 Device Control . 67 7.9 Error register 7.10 Features register 68 7.1 1 LBA High register 7.12 LBA Low regist 7.13 LBA Mid register 7.14 Sector Count r 7.15 Status register 8 Command descriptions . 74 8.1 CFA ERASE SECTORS . 75 8.2 CFA REQUEST EXTENDED ERROR CODE 8.3 CFA TRANSLATE SECTOR 8.4 CFA WRITE MULTIPLE WITHOUT ERASE 8.5 CFA WRITE SECTORS WITHOUT ERASE 82 8.6 CHECK MEDIA CARD TYPE 84 8.7 CHECK POWER MODE 86 8.8 DEVICE CONFIGURATION 8.9 DEVICE RESE 8.10 DOWNLOAD MICROCODE 8.1 1 EXECUTE DEVICE DIAGN . 103 8.12 FLUSH CACHE 8.1 3 FLUSH CACHE EXT 106 8.14 GET MEDIA STATUS 8.15 IDENTIFY DEVIC 8.16 IDENTIFY PACKET DEVICE 8.17 IDLE . 8.18 IDLE IMMEDIATE 8.19 MEDIA EJECT 149 8.20 MEDIA LOCK 151 8.21 MEDIA UNLOCK 153 8.24 READ BUFFER 8.25 READ DMA 163 8.26 READ DMA EXT 165 8.27 READ DMA QUEUED 168 8.28 READ DMA QUEUED EXT 8.29 READ LOG EX 8.30 READ MULTIP 8.31 READ MULTIP . 188 8.32 READ NATIVE 8.33 READ NATIVE MAX ADDRESS EXT 193 8.34 READ SECTOR(S) 8.35 READ SECTOR(S) 8.36 READ VERIFY SE 8.37 READ VERIFY SECTOR(S) EXT . 202 II Copyright American National Standards Institute Provided by IHS under license with ANSI Licensee=IHS Employees/1111111001, User=O'Connor, Maurice Not for Resale, 04/29/2007 05:31:22 MDTNo reproduction or networking permitted without license from IHS -,-,- Page 8.38 SECURITY DISABLE PASSWORD . 205 8.39 SECURITY ERASE PREPARE 207 8.40 SECURITY ERASE UNIT . 209 8.41 SECURITY FRE 8.42 SECURITY SET 8.43 SECURITY UNLOCK . 8.44 SEEK . 217 8.45 SERVICE . 8.46 SET FEATURES . 219 8.47 SET MAX . 8.48 SET MAX ADDRESS EXT . 235 8.49 SET MULTIPLE MODE . 238 8.50 SLEEP . 240 8.51 SMART 242 8.52 STANDBY . 267 8.53 STANDBY IMMEDIATE . 269 8.54 WRITE BUFFER . . 271 8.55 WRITE DMA . 272 8.56 WRITE DMA EXT. . 274 8.57 WRITE DMA QUEUED . 277 8.58 WRITE DMA QUEUED EXT . 281 8.59 WRITE LOG EXT . 287 8.60 WRITE MULTIPLE . 289 8.61 WRITE MULTIPL 292 8.62 WRITE SECTOR . 295 8.63 WRITE SECTOR( 297 9 Protocol . 300 9.1 Power-on and hardware reset protocol . 303 9.2 Software reset protocol 307 9.3 Bus idle protocol . 311 . . 9.4 Non-data comman . 9.5 PIO data-in comm . 324 9.6 PIO data-out command protocol 9.7 DMA command protocol . 331 9.8 PACKET command protocol 9.9 READIWRITE DMA QUEUED command protocol 9.1 O EXECUTE DEVICE DIAGNOSTIC command protocol 9.1 1 DEVICE RESET command protocol . 355 9.12 Signature and persistence . 9.13 Ultra DMA data-in 9.14 Ultra DMA data-out commands . 9.15 Ultra DMA CRC rules 9.1 6 Single device configurations . 362 10 Timing . 365 10.1 Deskewing . 365 10.2 Transfer timing . 1 Byte order . 10 Tables . 111 Copyr